mạch khếch đại vi sai (DIFFERENTIAL AMPLIFIERS)

Learning OutcomesAfter completing this chapter, students should be able to do
the following:• Design, analyze, and evaluate different types of
MOSFET constant-current sources for biasing
MOSFET amplifiers.• Design, analyze, and evaluate different types of BJT
constant-current sources for biasing BJT amplifiers.• Describe and analyze the characteristics of differential amplifiers and their DC and small-signal
characteristics.• Identify the parameters influencing the differential and
the common-mode gains of differential amplifiers.• Analyze and evaluate cascode-connected transistors
in order to obtain higher differential voltage gains.
Symbols and Their Meanings  
Symbol                                    Meaning
 Ad, Ac                                    Small-signal differential and commonmode voltage gains
CMRR                                     Common-mode rejection ratio of an amplifier
vid, vic                                     Small-signal differential and commonmode signal
vo1, vo2                                   Small-signal output voltages due to input
                                                 voltages at inverting and noninverting
                                                 terminals 

ro1, ro2                                    Small-signal output resistances of transistors
VM, VA                                   MOSFET channel modulation and BJT Early voltages
Vt, Vp                                      Threshold voltage of enhancement MOSFET and pinch-off voltage of
                                                depletion MOSFET
Content:

+Introduction

+Internal Structure of Differential Amplifiers 

+MOSFET Current Sources

+MOS Differential Amplifiers

+Depletion MOS Differential Amplifiers

+BJT Current Sources

+BJT Differential Amplifiers

+BiCMOS Differential Amplifiers

+Frequency Response of Differential Amplifiers 

+ Design of Differential Amplifiers

Detail:  

1/Introduction:

Differential amplifiers are commonly used as an input stage in various types of analog ICs, such as operational amplifiers, voltage comparators, voltage regulators, video amplifiers, power amplifiers, and balanced modulators and demodulators
This chapter covers the operation, analysis, and characteristics of differential amplifiers using BJTs and
MOSFETs. It also covers active current sources and voltage sources.

2/Internal Structure of Differential Amplifiers :

A differential amplifier acts as an input stage; its output voltage is proportional to the difference between
its two input voltages v1 and v2. It has a high voltage gain and is directly DC coupled to the input voltages and the load. As we will see later in this chapter, the voltage gain of a differential amplifier depends
directly on the output resistance of the current source acting as an active load.

 a/Characteristics of Differential Amplifiers

The differential stage can be represented by an equivalent amplifier, as shown in Fig. 9.1(a). If the two input
voltages are equal, a differential amplifier gives an output voltage of almost zero. Its voltage gain is very
large, so the input voltage is low, typically less than 50 mV. Thus, we can consider the input voltages as
small signals with zero DC components. That is, vG1 = vg1 and vG2 = vg2  

          

         

                                                                                     

b/Internal Structure of Differential Amplifiers

Note:

■ A differential amplifier consists of an active biasing circuit, an active load, and a differential transistor pair.■ The performance of a differential amplifier is measured by a differential gain Ad that occurs in response
to a differential voltage between two input terminals, a common-mode gain Ac that occurs in response
to a voltage common to both input terminals, and a common-mode rejection ratio CMRR.■ The CMRR is the ratio of the differential gain to the common-mode gain, and it is a measure of the
ability of an amplifier to amplify the differential signal and reject common-mode signals.  

3/MOSFET Current Sources

we saw the effects of active current sources in increasing the voltage gain of an
amplifier. Transistor current sources are widely used in analog ICs both as biasing elements and as loads
for amplifying stages. Current sources are less sensitive to variations in DC power supply and temperature. 

A current source can be designed by using either MOSFETs or BJTs
MOSFET current sources are analogous to BJT current sources

a/Basic Current Source

b/Cascode Current Source

c/Wilson Current Source

d/Design of Active Current Sources

The specifications for designing a current source will include the output current IQ, the output resistanceRo, and the DC supply voltage VDD. The design sequence is as follows:Step 1. Determine the design specifications: output current and output resistance.Step 2. Decide on the type of device to use—either BJTs or MOSFETs.Step 3. Choose the circuit topology best suited to the specifications. Use simple transistor models
for hand analysis to find the circuit-level solution, including component values and specifications of
BJTs or MOSFETs.Step 4. Use the standard values of components—for example, R1 5.6 M 5% instead of 5.72 M ,R2 30 k 5% instead of 29.3 k , and R3 27 k 5% instead of 27.5 k . Evaluate your
design and modify the values, if necessary.Step 5. Use PSpice/SPICE verification, employing complex circuit models to calculate the worstcase results due to component and parameter variations. Modify your design, if necessary  

Note:
■ For the same gate voltage, the drain current depends on the W⁄L ratio; thus, a low current can be
obtained by selecting an appropriate W⁄L ratio.■ For the same drain current, drain gate–shorted MOSFETs—for example, M3 and M4 in Fig. 9.6(a)—can
be used as a voltage divider network to generate biasing voltages of different magnitudes.■ The output resistances for different MOSFET sources are summarized as follows: output resistance of
MOSFET M1, ro1; basic source, ro1; multiple source, ro1; cascode source,
Wilson source, .■ Since MOSFETs do not draw any gate current, there is no need for base current compensation as there
is with BJTs. BJT sources have some advantages over MOSFET sources, such as a wider compliance
range and a higher output resistance. However, a higher output resistance can be obtained by cascodelike connections of MOSFETs.  

4/MOS Differential Amplifiers
a/NMOS Differential Pair

b/MOS Differential Pair with Active Load

c/Cascoded MOS Differential Amplifier

Note:

■ A MOS amplifier exhibits a linear DC characteristic and has a very high input resistance, tending
to infinity.■ It is relatively easy to connect MOS transistors in cascode form in order to control the drain current
and give high output resistance. A high-voltage gain can be obtained with a cascode connection.  

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language of computer

chapter objectives:

1. convert a short MIPS assembly code sequence into machine code

2. convert a short MIPS machine code sequence into assembly code

3. implement a pseudo-instruction by a minimum number of real MIPS assembly instructions

4. convert a short C code sequence into MIPS assembly code

5. analyze 4 design principles for ISA

Instruction Set:

nThe repertoire of instructions of a computer

nDifferent computers have different instruction sets

nBut with many aspects in common

nEarly computers had very simple instruction sets

nSimplified implementation

nMany modern computers also have simple instruction sets

The MIPS Instruction Set:

Arithmetic Operations:

nAdd and subtract, three operands

nTwo sources and one destination

  add a, b, c  # a gets b + c

  sub a, b, c  # a gets b - c

nAll arithmetic operations have this form

nDesign Principle 1: Simplicity favours regularity

nRegularity makes implementation simpler

nSimplicity enables higher performance at lower cost

Register Operands:

nArithmetic instructions use register 

operands

nMIPS has a 32 × 32-bit register file

nUse for frequently accessed data

nNumbered 0 to 31

n32-bit data called a “word”

nAssembler names

n$t0, $t1, …, $t9 for temporary values

n$s0, $s1, …, $s7 for saved variables

nDesign Principle 2: Smaller is faster

nc.f. main memory: millions of locations

nC code:

  f = (g + h) - (i + j);

nf, …, j in $s0, …, $s4

nCompiled MIPS code:

  add $t0, $s1, $s2
add $t1, $s3, $s4
sub $s0, $t0, $t1

Memory Operands:

nMain memory used for composite data

nArrays, structures, dynamic data

nTo apply arithmetic operations

nLoad values from memory into registers

nStore result from register to memory

nMemory is byte addressed

nEach address identifies an 8-bit byte

nWords are aligned in memory

nAddress must be a multiple of 4

nMIPS is Big Endian

nMost-significant byte at least address of a word

c.f. Little Endian: least-significant byte at least address

Register vs Memory:

nRegisters are faster to access than memory

nOperating on memory data requires loads and stores

nMore instructions to be executed

nCompiler must use registers for variables as much as 

possible

nOnly spill to memory for less frequently used variables

nRegister optimization is important!

Immediate Operands:

nConstant data specified in an instruction

  addi $s3, $s3, 4

nNo subtract immediate instruction

nJust use a negative constant

  addi $s2, $s1, -1

nDesign Principle 3: Make the common case fast

nSmall constants are common

nImmediate operand avoids a load instruction

The Constant Zero:

nMIPS register 0 ($zero) is the constant 0

nCannot be overwritten

nUseful for common operations

nE.g., move between registers

  add $t2, $s1, $zero

Representing Instructions:

nRepresenting a number using more bits

nPreserve the numeric value

nIn MIPS instruction set

naddi: extend immediate value

nlb, lh: extend loaded byte/halfword

nbeq, bne: extend the displacement

nReplicate the sign bit to the left

nc.f. unsigned values: extend with 0s

nExamples: 8-bit to 16-bit

n+2: 0000 0010 => 0000 0000 0000 0010

n–2: 1111 1110 => 1111 1111 1111 1110

Mips R-format Instructions:

Mips I-format Instructions:

logical Operations:

Conditional Operations:

More condition operations:

concluding remarks:

nDesign principles

1.  Simplicity favors regularity

2.  Smaller is faster

3.  Make the common case fast

4.  Good design demands good compromises

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cách dạy con bố mẹ nên học

BÀ GIÀ TAO LÀ MỘT PHỤ HUYNH TUYỆT VỜI.

1. Từ lúc tao mới đẻ ra bà già đã luôn tiêm nhiễm vào đầu tao là: "lớn lên mày đéo cần làm quá tốt việc nhà, đẻ ra 1 thằng suốt ngày lui cui rửa chén thì tao đẻ ra quả trứng ăn còn ngon hơn. ĐM mày cút ra đường và tạo ra giá trị thặng dư đi. Sau này tao chết thì mày xin tiền ai?"

2. Tao thuận tay trái, lúc nhỏ tao viết tay trái, bị bà giáo lớp 1 đánh suốt 2 tuần, tay chân sưng húp, bà già tao đợt đó đi làm xa về nhìn tay tao bầm tím, dắt tao lên trường, tìm bà hiệu trưởng : "Ê, con tao viết tay trái thì động vào gia phả nhà chúng mày hả mà chúng mày đánh nó bầm tay, nó hư nó quậy mày đánh chết mẹ nó cũng được nhưng vì viết tay trái mà mày đánh nó là mày chết mẹ mày với tao." Bà hiệu trưởng phải sang nhà tao xin lỗi nhưng mẹ tao vẫn quyết định chuyển trường cho tao.

3. Hồi bé tao lười đi ra đường chơi, thế là bà già nhìn mấy đứa nhà trọ kế bên cứ suốt ngày kéo nhau đi chơi net, bà già cũng bắt tao ra net. Lần đầu tao đi chơi net là do bà già đầu độc. Lớn một chút thì tao nghiện game, bà chỉ nói nhẹ nhàng, "nếu xác định làm game thủ thì cứ tập trung chơi, nhưng mà tao cho mày 1 năm, chơi game đéo tới nơi tới chốn thì tao cho đi nghĩa vụ". Rốt cuộc tao chọn học và bỏ game vì tao chợt nhận ra, game thủ ở VN bạc lắm :))

4. Có lần tao đi ăn sinh nhật với đám bạn về bị xe tông nằm viện, bà già nhất định không vào thăm tao, lúc về tao giận lắm mới hỏi : "tại sao mẹ ko vào thăm con?", bà già chỉ nói: "tao đang chống mắt lên coi mấy thằng mà mày coi là "bạn tốt" chúng nó có vào thăm mày không? Tao nói thật, cho dù xe có cán mày chết thì cũng đéo có một cành cúc nào của tụi nó cho mày đâu. Nhìn vào đám ôn dịch mày đang giao du là tao biết sớm muộn gì mày cũng có kết cục đó. Tao chỉ đang chờ nó diễn ra để mày sáng cái mắt mày ra.

5. Có lần giận đòi bỏ nhà ra đi, bà già nói thẳng: "Tao không dạy được mày, thì mày cút đi đi cho xã hội ngoài kia nó dạy. Tao đánh đòn mày tao lại xót, còn xã hội mà nó dạy được mày bằng cách đánh mày thì cùng lắm tao chấp nhận mất con".

6. Mày phiền quá, thi trường nào chẳng được. Đại học không phải là con đường duy nhất để ra đời kiếm tiền. Tao cũng học ĐH & biết ối đứa ra trường xong vẫn thất nghiệp. Tao cho mày tự lập từ nhỏ rồi thì quăng mày cây cuốc mày cũng tự kiếm tiền được, ăn thua là do bản lĩnh của mày thôi. Nhưng nói không phải để mày thi trượt đại học, bởi vì giữa cầm cây viết và cầm cây cuốc, cây nào nhẹ hơn?

7. "Mấy năm nay tao thấy rộ lên vụ đa cấp, hôm nào mày vô thử mấy công ty đa cấp coi nói cái gì mà ai cũng nghe theo rồi mày về trình bày lại cho tao" thế là tao theo lũ bạn đi nghe đa cấp. Ôi!!! Nghe xong mê mẩn giấc mơ làm giàu triệu đô về kể bà già, nghe xong bà cười sặc sụa: "chưa đủ thuyết phục, đi học thêm đi, học cách tụi nó quảng cáo sản phẩm, công dụng và lợi nhuận kĩ vào rồi về kể lại. Thế là lại đi vào Amway nghe về mô hình siêu thị các kiểu. Rồi lại về kể bà già nghe. Bà lại ngồi cười sặc sụa: "mày nói mà chừng nào tao cảm thấy là mày thuyết phục được tao thì nói. Mẹ!!! Ăn nói còn thua mấy anh đa cấp thì sau này ra đời ăn cám nhé con trai. Thế là tao cứ chui vô mấy cty đa cấp ngồi nghe họ giảng, chém gió các kiểu, tao cũng học được cách PR sản phẩm, cách nói chuyện trước đám đông, học được cả nghệ thuật thuyết phục... và khi nằm vùng trong đa cấp đủ lâu tao cũng nhận ra được mặt trái của đa cấp. Tao rút ra kinh nghiệm: "đa cấp không xấu, thậm chí nó còn là nơi đào tạo ra những vô địch về chém gió, PR và marketing, chỉ là khi về VN thì nó bị biến tướng, thành ra dẫn tới họ hàng anh em lừa đảo lẫn nhau, cùng nhau vỡ nợ."

8. Mày học trường nào cũng vậy, tao sẽ chỉ lo học phí cho mày 2 năm đầu, còn lại tự bơi. Cút đi ra đường mà làm thêm tự đóng học phí nhé con zai. Con trai 18 tuổi mà đéo tự lo được cho bản thân mày thì đòi lo cho ai? Thế là tao phải đi bưng phở 3 năm ;))

9. Sinh đứa con ra mà lúc nào cũng bảo bọc, cuộn nó lại thì chỉ có thể là phong kiến Việt Nam, một chế độ tự giết chết con mình. Không tin mày để ý, những danh nhân nổi tiếng trong lịch sử phong kiến toàn là bứt gia phong ra để tìm lối đi riêng. Bà Trưng thì cãi lời cha học võ đánh giặc, hay Bác Hồ cũng phải một thân một mình rời bỏ quê hương ra nước ngoài đấy thôi. Dạy con mà suốt ngày cứ muốn bó nó trong 4 bức tường thì chúc mừng, bạn đã đào tạo ra thêm 1 thằng vô dụng nữa cho xã hội. Phải cho nó ra ngoài, phải cho nó va chạm để nó biết cuộc đời không phải lúc nào cũng màu hồng chấm bi.

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BIPOLAR JUNCTION TRANSISTORS AND AMPLIFIERS

Learning Outcomes 
 After completing this chapter, students should be able to do
the following:• Describe the operation of bipolar junction transistors
(BJTs).• List the types of bipolar transistors and their
characteristics.• List the circuit configurations of transistor amplifiers
and their relative advantages and disadvantages.• Analyze and design bipolar transistor biasing circuits.• Determine the small-signal model parameters of
bipolar transistors.• Analyze and design bipolar transistor amplifiers.• Design a BJT amplifier to meet certain specifications.• Determine the low and high cutoff frequencies of
bipolar transistor amplifiers.  

CONTENT:

1.Bipolar Junction Transistors 

2.Principles of BJT Operation

3.Input and Output Characteristics

4.BJT Circuit Models

5.The BJT Switch

6.DC Biasing of Bipolar Junction Transistors

7.Common-Emitter Amplifiers

8.Emitter Followers

9.Common-Base Amplifiers

10.Multistage Amplifiers

11.The Darlington Pair Transistor

12.DC Level Shifting and Amplifier

13.Frequency Model and Response

of Bipolar Junction Transistors

14.Frequency Response

of BJT Amplifiers 

15.MOSFETs versus BJTs

16.BJT Amplifier Design

  

  

Symbols and Their Meanings 

1.Bipolar Junction Transistors 

■ The emitter and the collector regions are not symmetrical because the impurity-doping
concentrations in the emitter and collector are different and the geometry of these regions
can also differ significantly.■ We use the notation of actual current direction rather than the IEEE notation so that all
currents have positive values. That is, IC, IB, and IE are positive for npn-type transistors,
and they are negative for pnp-type transistors  

2.Principles of BJT Operation

■ A BJT can operate in any of the four operating modes depending on the biasing conditions: saturation, normal active, cutoff, and inverted. For an amplification, the B-E junction is forward biased and
the C-B junction is reverse biased, while for operation in the saturation region, both B-E and C-B
junctions are forward biased.■ The major physical parameters of a BJT are the forward current gain, the forward current ratio, the
saturation current, and the Early voltage.■ The collector voltage affects the width of the space charge or depletion regions and the width of the
depletion region depends on the C-B voltage  

a/Forward Mode of Operation

The B-E pn junction is forward biased, and the base–collector (B-C) pn junction is reverse biased in the
normal, active bias configuration as shown in Fig. 8.4(a). This configuration is called the forward-activeoperating mode. Using the pn junction theory developed in Sec. 6.5, the description of the device operation is as follows: 

 

Collector Current :

iC = IC,n = IE,n - IB,n = ISevBE>VT 

where IS is the saturation current, whose value ranges from 10^-12 A to 10^-16A, depending on the collector saturation current density and the doping profiles and levels. VT is the thermal voltage and equals kT/q,
which is 25.8 mV at room temperature

 

Emitter Current :

  iE = IE,n + IE,p + IB,n = IE,n + IE,p = ISE evBE>VT
where ISE is the saturation current that depends on the emitter saturation current density and is related to
the doping profiles and levels

 Base Current:

iB = iB1 + iB2 = IE,p + IB,n = ISB evBE>VT  

where ISB is the base saturation current.  

Forward-Current Ratio :

Forward-Current Gain : 

b/Cutoff, Saturation, and Inverse-Active

Modes of Operation 

+ In the cutoff mode, the B-E junction is either reverse biased, or zero biased, and the B-C junction is also

reverse biased. That is, VBE has negative voltage or zero, and VCB has a positive voltage. For reversebiased junctions, the minority carrier concentrations are ideally zero at each depletion edge. The potential
barrier heights of both the B-E and B-C junctions are increased, so there is essentially no charge flow.

+In the saturation mode, both junctions are forward biased. The B-E potential barrier is smaller than

the potential barrier of the B-C junction. There is a gradient in the minority carrier concentration in the
base to induce the collector current. Since both junctions are forward biased, the minority carrier concentrations are greater than the thermal equilibrium values at the depletion region edges. There will be
a net flow of electrons from the emitter to the collector. 

 +In the inverse-active mode, the B-E junction is reverse biased, and the B-C junction is forward biased. It is a mirror image of the forward-active mode. The potential barrier height of the B-E junction will increase while the potential barrier height of the B-C junction will decrease. Electrons from the collector will diffuse across the B-C junction into the base and then diffuse into the emitter. The bipolar transistor is not a symmetrical device and the characteristics will therefore be different from those of the active-mode operation. The B-C area is normally much larger than the B-E area, and as a result, not all of the injected electrons will be collected by the emitter. The relative doping concentrations in the base and collector are also different compared with those of the base and emitter. Therefore, we expect a significantly different characteristic between the forward-active and inverse-active modes of operation. The transistor is not normally operated in this mode

3.Input and Output Characteristics

Each of the three terminals of a transistor may be classified as an input terminal, an output terminal, or a common terminal. There are three possible configurations: (1) common emitter (CE), in which

the emitter is the common terminal; (2) common collector (CC) or emitter follower, in which the collector is the common terminal; and (3) common base (CB), in which the base is the common terminal.

■ Each of the three terminals of a transistor may be classified as an input terminal, an output terminal, or a common terminal. There are three possible configurations: (1) common
emitter (CE), in which the emitter is the common terminal; (2) common collector (CC) or
emitter follower, in which the collector is the common terminal; and (3) common base
(CB), in which the base is the common terminal.■ The output characteristic of a BJT can be divided into three regions: (1) a cutoff region
in which the transistor is off, (2) an active region in which the transistor exhibits a high
output resistance and has a current amplification, and (3) a saturation region in which the
transistor offers a low resistance.  

4.BJT Circuit Models

a/Linear DC Model

b/Small-Signal AC Model

c/Small-Signal Hybrid Model

d/Small-Signal Analysis

5.The BJT Switch

6.DC Biasing of Bipolar Junction Transistors

7.Common-Emitter Amplifiers

8.Emitter Followers

9.Common-Base Amplifiers

10.Multistage Amplifiers

11.The Darlington Pair Transistor

12.DC Level Shifting and Amplifier

13.Frequency Model and Response

of Bipolar Junction Transistors 

14.Frequency Response

of BJT Amplifiers 

15.MOSFETs versus BJTs

16.BJT Amplifier Design

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Computer Abstractions and Technology

Chapter Objectives

1. be able to identify which ones are Hardware, or System Software, or Application software of a computer

2. be able to identify which ones are High-level languages, or Assembly language, or Machine language

3. be able to identify which ones are Operating systems, or Compilers, or Assemblers

4. be able to evaluate a computer’s performance based on its clock rate and CPI

What You Will Learn

nHow programs are translated into the machine language

nAnd how the hardware executes them

nThe hardware/software interface

nWhat determines program performance

nAnd how it can be improved

nHow hardware designers improve performance

nWhat is parallel processing

Understanding Performance

nAlgorithm

nDetermines number of operations executed

nProgramming language, compiler, architecture

nDetermine number of machine instructions executed per operation

nProcessor and memory system

nDetermine how fast instructions are executed

nI/O system (including OS)

nDetermines how fast I/O operations are executed

Eight Great Ideas

Below Your Program

Levels of Program Code

Inside the Processor (CPU)

nDatapath: performs operations on data

nControl: sequences datapath, memory, ...

nCache memory

nSmall fast SRAM memory for immediate access to data

Networks

nCommunication, resource sharing, nonlocal access

nLocal area network (LAN): Ethernet

nWide area network (WAN): the Internet

nWireless network: WiFi, Bluetooth

Manufacturing ICs

Integrated Circuit Cost

Defining Performance

Response Time and Throughput

nResponse time

nHow long it takes to do a task

nThroughput

nTotal work done per unit time

ne.g., tasks/transactions/… per hour

nHow are response time and throughput affected by

nReplacing the processor with a faster version?

nAdding more processors?

nWe’ll focus on response time for now…

Relative Performance

CPU Clocking

CPU Time

 CPU Time Example

Instruction Count and CPI

CPI Example

CPI in More Detail

CPI Example

Performance Summary

Concluding Remarks

nCost/performance is improving

nDue to underlying technology development

nHierarchical layers of abstraction

nIn both hardware and software

nInstruction set architecture

nThe hardware/software interface

nExecution time: the best performance measure

nPower is a limiting factor

        Use parallelism to improve performance

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